J. Benfica, B. Green, B. C. Porcher, L. B. Poehls, F. Vargas, N. H. Medina, N. Added, V. A. P. Aguiar, E. L. A. Macchione, F. Aguirre, M. A. G. Silveira, M. Perez, M.S. Haro, I. Sidelnik, J. Blostein, J. Lipovetzky, E. A. Bezerra

IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 63, NO. 2, APRIL 2016

15/04/2016

Abstract

This work proposes a novel methodology to evaluate SRAM-based FPGA's susceptibility with respect to Single-Event Upset (SEU) as a function of noise on VDD power pins, TotalIonizing Dose (TID) and TID-imprinted effect on BlockRAM cells. The proposed procedure is demonstrated for SEU measurements on a Xilinx Spartan 3E FPGA operating in an 8 MV Pelletron accelerator for the SEU test with heavy-ions, whereas TID was deposited by means of a Shimadzu XRD-7000 X-ray diffractometer. In order to observe the TID-induced imprint effect inside the BlockRAM cells, a second SEU test with neutrons was performed with Americium/Beryllium ( 241 AmBe). The noise was injected into the power supply bus according to the IEC 61.000-4-29 standard and consisted of voltage dips with 16.67% and 25% of the FPGA's VDD at frequencies of 10 Hz and 5 kHz, respectively. At the end of the experiment, the combined SEU failure rate, given in error/bit.day, is calculated for the FPGA's BlockRAM cells. The combined failure rate is defined as the average SEU failure rate computed before and after exposition of the FPGA to the TID.

10.1109/TNS.2016.2523458